Finite State Machine (FSM)

A model of computation consisting of a set of states, a start state, an input alphabet, and a transition function that maps input symbols and current states to a next state. Computation begins in the start state with an input string. It changes to new states depending on the transition function. There are many variants, for instance, machines having actions (outputs) associated with transitions (Mealy machine) or states (Moore machine), multiple start states, transitions conditioned on no input symbol (a null) or more than one transition for a given symbol and state (nondeterministic finite state machine), one or more states designated as accepting states (recognizer), etc.

HDLC Flags

HDLC is a data link protocol which uses a unique bit sequence to delimit the start and end of each PDU transported by the data link layer service. In HDLC, frames are delimited by a sequence of bits known as a "flag". The flag sequence is a unique 8-bit sequence of the form 0111 1110. The way in which this is performed is described in the diagram

(fig)The flags before and after an HDLC frame indicate the start and end of the frame